
ST72321xx-Auto Main clock controller with real-time clock and beeper (MCC/RTC)
Doc ID 13829 Rev 1 83/243
Figure 34.
Main clock controller (MCC/RTC) block diagram
11.6
Low power modes
11.7
Interrupts
The MCC/RTC interrupt event generates an interrupt if the OIE bit of the MCCSR register is
set and the interrupt mask in the CC register is not active (RIM instruction).
DIV 2, 4, 8, 16
MCC/RTC INTERRUPT
SMSCP1 CP0 TB1 TB0 OIE OIF
CPU CLOCK
MCCSR
12-BIT MCC RTC
COUNTER
TO CPU AND
PERIPHERALS
f
OSC2
f
CPU
MCO
MCO
BC1 BC0
MCCBCR
BEEP
SELECTION
BEEP SIGNAL
1
0
TO
WATCHDOG
TIMER
DIV 64
Table 38. Effect of low power modes on MCC/RTC
Mode Effect
Wait
No effect on MCC/RTC peripheral.
MCC/RTC interrupt causes the device to exit from Wait mode.
Active Halt
No effect on MCC/RTC counter (OIE bit is set), the registers are frozen.
MCC/RTC interrupt causes the device to exit from Active Halt mode.
Halt
MCC/RTC counter and registers are frozen.
MCC/RTC operation resumes when the MCU is woken up by an interrupt with
“exit from HALT” capability.
Table 39. MCC/RTC interrupt control/wake-up capability
Interrupt event Event flag
Enable
control bit
Exit from
Wait
Exit from
Halt
Time base overflow event OIF OIE Yes No
(1)
1. The MCC/RTC interrupt wakes up the MCU from Active Halt mode, not from Halt mode.
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