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ST72321xx-Auto Electrical characteristics
Doc ID 13829 Rev 1 195/243
19.5 Clock and timing characteristics
Subject to general operating conditions for V
DD
, f
CPU
, and T
A
.
19.5.1 General timings
19.5.2 External clock source
Figure 78. Typical application with an external clock source
Table 114. General timings
Symbol Parameter Conditions Min Typ
(1)
1. Data based on typical application software.
Max Unit
t
c(INST)
Instruction cycle time
2312t
CPU
f
CPU
= 8 MHz 250 375 1500 ns
t
v(IT)
Interrupt reaction time
(2)
t
v(IT)
= t
c(INST)
+ 10
2. Time measured between interrupt event and interrupt vector fetch. t
c(INST)
is the number of t
CPU
cycles
needed to finish the current instruction execution.
10 22 t
CPU
f
CPU
=8MHz 1.25 2.75 µs
Table 115. External clock source
Symbol Parameter Conditions Min Typ Max Unit
V
OSC1H
OSC1 input pin high level voltage
See Figure 78
0.7xV
DD
V
DD
V
V
OSC1L
OSC1 input pin low level voltage V
SS
0.3xV
DD
t
w(OSC1H)
t
w(OSC1L)
OSC1 high or low time
(1)
1. Data based on design simulation and/or technology characteristics, not tested in production.
5
ns
t
r(OSC1)
t
f(OSC1)
OSC1 rise or fall time
(1)
15
I
lkg
OSC1 input leakage current V
SS
< V
IN
< V
DD
±1 µA
OSC1
OSC2
f
OSC
EXTERNAL
ST72XXX
CLOCK SOURCE
Not connected internally
V
OSC1L
V
OSC1H
t
r(OSC1)
t
f(OSC1)
t
w(OSC1H)
t
w(OSC1L)
I
lkg
90%
10%
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