
16-bit timer ST72321xx-Auto
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13.7.9 Output compare 2 low register (OC2LR)
This is an 8-bit register that contains the low part of the value to be compared to the CLR
register.
13.7.10 Counter high register (CHR)
This is an 8-bit register that contains the high part of the counter value.
13.7.11 Counter low register (CLR)
This is an 8-bit register that contains the low part of the counter value. A write to this register
resets the counter. An access to this register after accessing the CSR register clears the
TOF bit.
13.7.12 Alternate counter high register (ACHR)
This is an 8-bit register that contains the high part of the counter value.
OC2LR Reset value: 0000 0000 (00h)
76543210
MSB LSB
RW RW RW RW RW RW RW RW
CHR Reset value: 1111 1111 (FFh)
76543210
MSB LSB
RO RO RO RO RO RO RO RO
CLR Reset value: 1111 1100 (FCh)
76543210
MSB LSB
RO RO RO RO RO RO RO RO
ACHR Reset value: 1111 1111 (FFh)
76543210
MSB LSB
RO RO RO RO RO RO RO RO
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