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Electrical characteristics ST72321xx-Auto
218/243 Doc ID 13829 Rev 1
19.12.2 General PCB design guidelines
To obtain best results, some general design and layout rules should be followed when
designing the application PCB to shield the noise-sensitive, analog physical interface from
noise-generating CMOS logic signals.
Use separate digital and analog planes. The analog ground plane should be connected
to the digital ground plane via a single point on the PCB.
Filter power to the analog power planes. It is recommended to connect capacitors, with
good high frequency characteristics, between the power and ground lines,
placing
0.1µF and optionally, if needed 10pF capacitors as close as possible to the ST7 power
supply pins and a 1 to 10µF capacitor close to the power source (see Figure 100).
The analog and digital power supplies should be connected in a star network. Do not
use a resistor, as V
AREF
is
used as a reference voltage by the A/D converter and
any
resistance would cause a voltage drop and a loss of accuracy.
Properly place components and route the signal traces on the PCB to shield the analog
inputs. Analog signals paths should run over the analog ground plane and be as short
as possible. Isolate analog signals from digital signals that may switch while the analog
inputs are being sampled by the A/D converter. Do not toggle digital outputs on the
same I/O port as the A/D input being converted.
Figure 100. Power supply filtering
V
SS
V
DD
V
DD
ST72XXX
V
AREF
V
SSA
POWER
SUPPLY
SOURCE
ST7
DIGITAL NOISE
FILTERING
EXTERNAL
NOISE
FILTERING
1 to 10µF
0.1µF
0.1µF
+
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